Stochastic-Based Spin-Programmable Gate Array with Emerging MTJ Device Technology

Stochastic-Based Spin-Programmable Gate Array with Emerging MTJ Device Technology

This paper describes the stochastic-based Spin-Programmable Gate Array (SPGA), an innovative architecture attempting to exploit the stochastic switching behavior newly found in emerging spintronic devices for reconfigurable computing. While many recently studies have investigated using Spin Transfer Torque Memory (STTM) devices to replace configuration memory in field programmable gate arrays (...

Reliable Laser Programmable Gate Array Technology

Field-Programmable Gate Arrays have become popular ever since their introduction. Compared to other digital circuit implementation media, they have lower NRE cost and rapid turnaround with the penalties of reduced speed and larger size. Thus better FPGA programmable switch technology is desired in order to gain speed and density advantages. In this paper, Laser-induced MakeLink technology is pr...

Field Programmable Gate Array–based Implementation of an Improved Algorithm for Objects Distance Measurement (TECHNICAL NOTE)

In this work, the design of a low-cost, field programmable gate array (FPGA)-based digital hardware platform that implements image processing algorithms for real-time distance measurement is presented. Using embedded development kit (EDK) tools from Xilinx, the system is developed on a spartan3 / xc3s400, one of the common and low cost field programmable gate arrays from the Xilinx Spartan fami...

Character Recognition Based on Cmac with Field Programmable Gate Array

We propose a Cerebellar Model Arithmetic Computer (CMAC) neural network for character recognition with an FPGA architecture. The CMAC has many advantages in terms of speed of operation based on LMS training. Its ability realizes arbitrary nonlinear mapping and fast practical hardware implementation. The CMAC, being a learning algorithm, can rapidly obtain output using nonlinear mapping with loo...

Technology Mapping for a Two-Output RAM-Based Field Programmable Gate Array